Cache-coherent SMP (symmetric, or shared-memory, multi processing) systems can provide various grades of memory ordering guarantees, the stronger ones being more expensive but making it easier to write correct code: https://en.wikipedia.org/wiki/Memory_ordering
Modern x86 CPUs provide Total Store Ordering (TSO), which is the strongest guarantee (that is used in actual SMP systems).
I'm interested in what the situation was in the early 90s. At that time, a typical x86 SMP system would have a pair of 486 CPUs, each with memory controller on a separate chip. Did those systems also provide TSO?