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Why did the Cray-1 have 8 parity bits per word?

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According to https://en.wikipedia.org/wiki/Cray-1

The Cray-1 was built as a 64-bit system, a departure from the 7600/6600, which were 60-bit machines (a change was also planned for the 8600). Addressing was 24-bit, with a maximum of 1,048,576 64-bit words (1 megaword) of main memory, where each word also had 8 parity bits for a total of 72 bits per word.[10] There were 64 data bits and 8 check bits.

It seems to me by the nature of parity, it should suffice to have one bit of overhead per word, rather than eight. I can understand on something like an 8088/87, you might be stuck with 1/8 because the memory system deals in eight bits at a time, but why is it that way on a 64-bit machine?


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